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Lecture time: 10:00 am.-11:am, Thursday, 4th December, 2008
Location: C-203
 
Prof. Lim YC
School of Electrical and Electronic Engineering
Nanyang Technological University
 
Abstract of Lecture
 
In this talk, we present a new piloted method for extracting information on the distance between the frequency of the input sinusoid and the zero of the notch. It uses three (or more) notches, namely, a main notch and two (or more) pilot notches implemented with minimal additional cost. The pilot notches are used to analyze the gradient estimates at the same sampling instance but at several frequency points as the main notch. Simulation results show that the piloted notch technique is significantly superior to step-size determination based on gradient estimates at several sampling instances. The piloted method can be used in conjunction with most existing algorithms to determine the step size.
 
 
Brief Biography
 

Lim Yong Ching
A.C.G.I. and B.Sc. degrees in 1977 and the D.I.C. and Ph.D. degrees in 1980, all in electrical engineering, from Imperial College, London, U.K.
He was with National University of Singapore from 1982 to 2003. Since 2003, he has been with the School of Electrical and Electronics Engineering, Nanyang Technological University.
Dr. Lim was selected to receive the 1996 IEEE Circuits and Systems Society’s Guillemin-Cauer Award, the 1990 IREE ( Australia) Norman Hayes Memorial Award, 1977 IEE (UK) Prize and the 1974–77 Siemens Memorial ( Imperial College) Award.
Dr. Lim served as a distinguished lecturer for the IEEE Circuits and Systems Society from 2001 to 2002, an associate editor for the IEEE Transactions on Circuits and Systems from 1991 to 1993 and from 1999 to 2001, and for Circuits, Systems and Signal Processing from 1993 to 2000. He served as the Chairman of the DSP Technical Committee of the IEEE Circuits and Systems Society from 1998 to 2000. He served in the Technical Program Committee’s DSP Track as the Track Chair in ISCAS’97 and ISCAS’00 and as a Track Co-chair in ISCAS’99.
Dr. Lim is a Fellow of the IEEE.
 


 
 
 
Research interests: digital signal processing and VLSI circuits and systems design
 
Lecture time: 10:00 am.-11:am, Thursday, 4th December, 2008
Location: C-203

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