糖心Vlog

导师与研究领域、方向：

国家高层次青年人才,IEEE Senior Member, IEEE EDS Technical Committee Member (Compact Modeling)。IEEE EDTM,ISEDA等国际会议的技术委员会成员/分会主席，IEEE JEDS客座编辑(2018)。获得ISEDAHonorable Mention Paper Award (2024)、华为优秀合作成果奖(2023)、IEEE EDSSC最佳论文奖(2019)、William Mong纳米科学与技术杰出论文奖(2012)等。指导学生获得IEEE EDSSC最佳学生论文奖(2018)。EDA技术团体标准牵头人。

研究领域为模型驱动的下一代计算系统，涉及新型微纳尺度半导体器件的物理、器件模型和电路模拟方法、电路系统的可靠性、电子设计自动化贰顿础、神经形态器件和计算系统。目前开展的课题包括先进工艺节点颁惭翱厂器件建模、新型逻辑和存储器件、铁电神经形态器件、电路模拟器的动态时间演进算法和模型降阶算法、神经形态电路贰顿础等。

近年来取得的主要成果：

专着/章节：

[1]Lining Zhangand Mansun Chan, Book Editors, Tunneling Field-Effect Transistor Technology, Springer, 2016

[2]Lining Zhang, Jun Huang, Mansun Chan, “Steep Slope Devices and TFETs,” Chapter 1 of Tunneling Field Effect Transistor Technology, Springer, 2016, pp. 1-31.

代表性期刊文章：

[1] C. Liu*, X. Wang, C. Shen, L. Ma, X. Yang, Y. Kong, W. Ma, Y. Liang, S. Feng, X. Wang, Y. Wei, X. Zhu, B. Li, C. Li, S. Dong,L. Zhang*, W. Ren, D. Sun*, H. Cheng, “A hot-emitter transistor based on stimulated emission of heated carriers,”Nature, vol. 632, pp. 782-787, Aug. 2024

[2] W. Dai, Y. Li, Z. Rong, B. Peng,L. Zhang*, R. Wang*, R. Huang, “Statistical compact modeling with artificial neural networks,” to appearIEEE Trans. Computer-aided Design of Integrated Circuits and Systems, 2023

[3] F. Zhang, H. Li, K. Wang, W. Dai, Y. Jiao, F. Ding, Y. Ren, Y. Wu, W. Bu, Q. Huang,L. Zhang*, R. Huang, “A surface potential based full region current model for Si DS-TFET,” to appearIEEE Trans. Electron Devices, 2023

[4] N. Feng, H. Li, B. Peng, F. Zhang, P. Cai,L. Zhang*, R. Wang*, R. Huang, “Metal-ferroelectric- semiconductor tunnel junction: essential physics and design explorations,”IEEE Trans. Electron Devices, vol. 70, no. 6, pp. 3382-3389, June 2023

[5] Q. Hu, C. Gu, Q. Li, S. Zhu, S. Liu, Y. Li,L. Zhang, R. Huang, Y. Wu, “True nonvolatile high-speed DRAM cells using tailored ultrathin IGZO,”Advanced Materials, vol. 35, no. 20, pp. 2210554, May 2023

[6] C. J. Estrada, Z. Ma,L. Zhang, M. Chan, “Threshold voltage model for 2-D FETs with undoped body and gated source,”IEEE Trans. Electron Devices, vol. 70, no. 5, pp. 2575-2580, May 2023

[7] N. Feng, H. Li,L. Zhang*, N. Ji, F. Zhang, X. Zhu, Z. Shang, P. Cai, M. Li, R. Wang, R. Huang, “A physics-based dynamic compact model of ferroelectric tunnel junctions,”IEEE Electron Device Letters, vol. 44, no. 2, pp. 261-264, Feb. 2023

[8] B. Peng, Y. Jiao, H. Zhong, Z. Rong, Z. Wang, Y. Xiao, W. Wong,L. Zhang*, R. Wang*, R. Huang, “Compact modeling of quantum confinements in nanoscale gate-all-around MOSFETs,” accepted byFundamental Research, 2022

[9]L. Zhang*, M. Chan, “Editorial: Hardware Implementation of Spike-based Neuromorphic Computing and its Design Methodologies,”Frontiers in NeuroScience, doi: 10.3389/fnins.2022.1113983

[10] D. Wang, L. Zhou, Y. Xue, P. Ren,L. Zhang, X. Li, X. Liu, J. Wang, B. Wu, Z. Ji* , R. Wang*, K. Cao and R. Huang, “Defect-Based Empirical Model for On-State Degradation in Sub-20-nm DRAM Periphery pFETs Under Arbitrary Condition,”IEEE Trans. Electron Devices, vol. 69, no. 12, pp. 6669-6675, Dec. 2022

[11] F. Ding, Y. Jiao, B. Peng, H. Li, W. Liu,L. Zhang*, R. Wang, R. Huang, “Modeling the gradual RESET of phase change memory with confined geometry,”IEEE Trans. Electron Devices, vol. 69, no. 12, pp. 6662-6668, Dec. 2022

[12] Y. Li, X. Huang, C. Liao, R. Wang, S. Zhang,L. Zhang*, R. Huang, “A dynamic current hysteresis model for IGZO-TFT,”Solid-State Electronics, vol. 197, pp. 108459, Sept. 2022

[13] Z. Wang, Y. Lv,L. Zhang, L. Liao, C. Jiang, “Strain release enabled bandgap scaling in Ge nanowire and tunnel FET application,”IEEE Trans. Electron Devices, vol. 69, no. 8, pp. 4725-4729, Aug. 2022

[14] Z. Ma, C. Estrada, K. Gong,L. Zhang*, M. Chan, “On-chip integrated high gain complementary MoS2 inverter circuit with exceptional high hole current p-channel field-effect transistors,”Adv. Elec. Mater., doi.org/10.1002/aelm.202200480, July 2022

[15] Y. Jiao, X. Huang, Z. Rong, Z. Ji, R. Wang,L. Zhang*,“Modeling multigate negative capacitance transistors with self-heating effects,”IEEE Trans. Electron Devices, vol. 69, no. 6, pp. 3029-3036, June. 2022

[16]N. Feng, H. Li, C. Su,L.Zhang*, Q. Huang, R. Wang, R. Huang, “A dynamic compact model for ferroelectric capacitance,”IEEE Electron Device Letters, vol. 43, no. 2, pp. 390-393, Mar. 2022

[17] F. Ding, B. Peng, X. Li,L. Zhang*, R. Wang, Z. Song, R. Huang, “A review of compact modeling for phase change memory,”J. of Semi., vol. 43, no. 2, pp. 023101, Feb. 2022

[18] X. Chen, F. Ding, X. Huang, X. Lin, R. Wang, M. Chan,L. Zhang*, R. Huang, “A robust and efficient compact model for phase change memory circuit simulations,”IEEE Trans. Electron Devices, vol. 68, no. 9, pp. 4404-4410, Sept. 2021

[19] X. Huang, X. Chen, L. Li, H. Zhong, Y. Jiao, X. Lin, Q. Huang,Lining Zhang*, Ru Huang, “A dynamic current model for MFIS negative capacitance transistors,”IEEE Trans. Electron Devices, vol. 68, no. 7, pp. 3665-3671, July 2021

[20] Z. Huang, S. Xiong, N. Dong,Lining Zhang, X. Lin, “A Study of the gate-stack small-signal model and determination of interface traps in GaN-based MIS-HEMT,”IEEE Trans. Electron Devices, vol. 67, no. 4, pp. 1507-1512, Apr. 2021

[21] Z. Ma,Lining Zhang*, C. Zhou, M. Chan, “High current Nb-doped P-channel MoS2 field-effect transistor using Pt contact,”IEEE Electron Device Letters, vol. 42, no. 3, pp. 343-346, Mar. 2021

[22] X. Chen, F. Hu, X. Huang, W. Cai, M. Liu, C. Lam, X. Lin,Lining Zhang*, M.Chan, “A SPICE model of phase change memory for neuromorphic circuits,”IEEE Access, vol. 8, pp.95278-95287, May 2020

[23] Z. Rong, W. Cai, Y. Zhang, P. Wu, X. Li,Lining Zhang*, “On the enhanced Miller capacitance of source- gated thin film transistors,”IEEE Electron Device Letters, vol.41, no.5, pp. 741-744, May 2020

[24] Z. Ahmed, Q. Shi, Z. Ma,Lining Zhang*, H. Guo, M. Chan, “Analytical Monolayer MoS2 MOSFET Modeling Verified by First Principle Simulations,”IEEE Electron Device Letters, vol. 41, no. 1, pp. 171-174, Jan. 2020

[25] H. Hu, D. Liu, X. Chen, D. Dong, X. Cui, M. Liu, X. Lin,Lining Zhang*, M. Chan, “A compact phase change memory model with dynamic state variables,”IEEE Trans. Electron Devices, vol. 67, no. 1, pp. 133-139, Jan. 2020

[26]Lining Zhang*, L. Wang, W. Wu, M. Chan, “Modeling Current–Voltage Characteristics of Bilayer Organic Light-Emitting Diodes,”IEEE Trans. Electron Devices, vol. 66, no. 1, pp. 139-145, Jan. 2019

[27]Lining Zhang*, C. Ma, Y. Xiao, H. Zhang, X. Lin, M. Chan, “A dynamic time evolution method for concurrent device-circuit aging simulations,”IEEE Trans. Electron Devices, vol. 66, no. 1, pp. 184-190, Jan. 2019

代表性会议文章：

[1] H. Liu, S. Chen, W. Dai, Y. Li, B. Peng,Lining Zhang*, R. Wang*, R. Huang, “A neural network-based framework for accelerated device-circuit electrothermal co-simulations in GAAFETs,” in Proc. ISEDA, pp. 89, 2024 [Honorable Mention Paper Award]

[2] Qing Shi,Lining Zhang*, Yu Zhu, Lei Liu, Mansun Chan, Hong Guo, “Atomic disorder scattering in emerging transistors by parameter-free first principle modeling,’ 2014 IEEE International Electron Device Meeting (IEDM), Dec. 15-17, 2014, San Francisco, USA

[3]Lining Zhang*, Jin He and Mansun Chan, “A Compact Model for Double-Gate Tunneling Field-Effect-Transistors and Its Implications on Circuit Behaviors”, 2012 IEEE International Electron Device Meeting (IEDM), Dec. 10-12, 2012, San Francisco, USA

[4] H. Hu,Lining Zhang, X. Lin, M. Chan, “Modeling the heating effects in PCM for circuit simulation accelerations,” IEEE Conference on Electron Devices and Solid-State Circuits, June.12-14, 2019, Xi’an, China [Best Paper Award]

[5] D. Song,Lining Zhang*, D. Liu, H. Zhang, X. Lin, “An improvement of BSIM for fast circuit simulations,” IEEE Conference on Electron Devices and Solid-State Circuits, June.6-8, 2018, Shenzhen, China [Best Student Paper Award]

博士后招收：

诚招相关方向的博士后进行合作研究。详见学院网站的招聘启事。

对计划招收研究生的基本要求:

1、专业范围： 微电子，物理，数学，计算机；

2、乐观、主观能动性、对解决工程问题有好奇心、有团队合作精神